Build tool/InstallRAMISR - Revision history

Aoineko: /* RAMISR_PAGE3 */

2026-07-09T21:07:23Z

‎RAMISR_PAGE3

2026-07-09T21:07:04Z

‎RAMISR_PAGE3

2026-07-09T21:06:37Z

2026-07-07T12:35:29Z

‎RAMISR_PAGE3

2026-07-01T13:18:43Z

‎RAMISR_SEGMENT0

2026-07-01T13:16:22Z

2026-07-01T13:15:14Z

‎RAMISR_PAGE3

2026-07-01T13:09:29Z

‎RAMISR_PAGE3

2026-07-01T13:08:59Z

2026-07-01T13:08:02Z

‎RAMISR_PAGE3

@@ Line 63: / Line 63: @@
 Thus, 452 bytes are used for the vector tables (257 bytes) and the ISR code itself.
-Note: As IM2 mode use Z80 register <tt>I</tt> to know where to jump when an interrupt occurs, programmers that would like to use <tt>RAMISR_PAGE3</tt> option must not use inline assembler code that use this register.
+Note: As IM2 mode use Z80 register <tt>I</tt> to know where to jump when an interrupt occurs, programmers that would like to use <tt>RAMISR_PAGE3</tt> option must not use inline assembler code that change this register value.
 [[Samples#Graph_Mode_3|s_gm3]] sample (GM3 mode) showcase the use of this option.

@@ Line 63: / Line 63: @@
 Thus, 452 bytes are used for the vector tables (257 bytes) and the ISR code itself.
-Note: As IM2 mode use Z80 register <tt>I</tt> to know where to jump when an interrupt occurs, programmers that like to use <tt>RAMISR_PAGE3</tt> option must not use inline assembler code that use this register.
+Note: As IM2 mode use Z80 register <tt>I</tt> to know where to jump when an interrupt occurs, programmers that would like to use <tt>RAMISR_PAGE3</tt> option must not use inline assembler code that use this register.
 [[Samples#Graph_Mode_3|s_gm3]] sample (GM3 mode) showcase the use of this option.

@@ Line 62: / Line 62: @@
 In this case, C variables will be accumulated starting from address 0xC1C4.
 Thus, 452 bytes are used for the vector tables (257 bytes) and the ISR code itself.
 [[Samples#Graph_Mode_3|s_gm3]] sample (GM3 mode) showcase the use of this option.

@@ Line 49: / Line 49: @@
 == RAMISR_PAGE3 ==
-When using <tt>RAMISR_PAGE3</tt> option, the boot sequence activate Interrupt mode 2 (IM2) and setup a vector table so that, when an interrupt occurs, only page 3 will be accessed.
+When using <tt>RAMISR_PAGE3</tt> option, the boot sequence install the interrupt handler in RAM, setup a vector table and activate Interrupt mode 2 (IM2) so that, when an interrupt occurs, only page 3 will be accessed.
 As page 0 is not used anymore by the system, the user can freely use it to have:
@@ Line 59: / Line 59: @@
 ** For MSX computers equipped with a Memory mapper, you can freely change the segment displayed on page 0.
-This option can only be used with <tt>ForceRamAddr=0xC000</tt> (or <tt>ForceRamAddr=0</tt> as it is equivalent).
+This option can only be used with <tt>ForceRamAddr=0xC000</tt> (or the default <tt>ForceRamAddr=0</tt> as it is equivalent).
 In this case, C variables will be accumulated starting from address 0xC1C4.
 Thus, 452 bytes are used for the vector tables (257 bytes) and the ISR code itself.
 [[Samples#Graph_Mode_3|s_gm3]] sample (GM3 mode) showcase the use of this option.

@@ Line 23: / Line 23: @@
 Code and data from your <tt>_p0</tt> file will be available starting from address 0x0100 (after the ISR) so you have a little less than 16 KB available in page 0 (16 KB - 0x100 = 16128 bytes).
-<tt>_p0</tt> will be place in segment after the 32 KB of your main program. Segment number depend of the mapper format your are using:
+The 16 KB content of <tt>_p0</tt> will be place in segment after the 32 KB of your main program. Segment number depend of the mapper format your are using:
 {| class="wikitable"
 ! Mapper !! Segments

← Older revision		Revision as of 13:15, 1 July 2026
Line 59:		Line 59:
	** For MSX computers equipped with a Memory mapper, you can freely change the segment displayed on page 0.		** For MSX computers equipped with a Memory mapper, you can freely change the segment displayed on page 0.

		+	This option can only be used with <tt>ForceRamAddr=0xC000</tt> (or <tt>ForceRamAddr=0</tt> as it is equivalent).
		+	In this case, RAM variable will be accumulated starting to address 0xC1C4.
		+	Thus, 452 bytes are used for the vector tables (257 bytes) and the ISR code itself.

	[[Samples#Graph_Mode_3\|s_gm3]] sample (GM3 mode) showcase the use of this option.		[[Samples#Graph_Mode_3\|s_gm3]] sample (GM3 mode) showcase the use of this option.

@@ Line 54: / Line 54: @@
 * A fixed chunk of 16 KB of ROM (for 48 KB plain-ROM),
 * Freely switchable segments using [[NEO mapper]]:
-** NEO-16: 1 bank of 16 KB (0x0000h-0x3FFF),
+** NEO-16: 1 bank of 16 KB (0x0000h~0x3FFF),
-** NEO-8: 2 banks of 8 KB (0x0000-0x1FFF and 0x2000-0x3FFF).
+** NEO-8: 2 banks of 8 KB (0x0000~0x1FFF and 0x2000~0x3FFF).
 * 16 KB of RAM (for MSX with at least 64 KB of RAM).
 ** For MSX computers equipped with a Memory mapper, you can freely change the segment displayed on page 0.

@@ Line 51: / Line 51: @@
 When using <tt>RAMISR_PAGE3</tt> option, the boot sequence activate Interrupt mode 2 (IM2) and setup a vector table so that, when an interrupt occurs, only page 3 will be accessed.
-As page 0 is not used by the system, the user can freely use it to have:
+As page 0 is not used anymore by the system, the user can freely use it to have:
-* A fixed section of 16 KB of ROM (for 48 KB plain-ROM),
+* A fixed chunk of 16 KB of ROM (for 48 KB plain-ROM),
-* Switchable bank using [[NEO mapper]]
+* Freely switchable segments using [[NEO mapper]]:
-** NEO-16: 1 segment of 16 KB (bank 0: 0000h-3FFFh),
+** NEO-16: 1 bank of 16 KB (0000h-3FFFh),
-** NEO-8: 2 segments of 8 KB (bank 0: 0000h-1FFFh and bank 1: 2000h-3FFFh).
+** NEO-8: 2 banks of 8 KB (0000h-1FFFh and 2000h-3FFFh).
 * 16 KB of RAM (for MSX with at least 64 KB of RAM).
 [[Samples#Graph_Mode_3|s_gm3]] sample (GM3 mode) showcase the use of this option.