Z80 wait instructions
From MSX Game Library
Sometimes, the CPU needs to wait a little while without doing anything (for example, when waiting for a device to be ready to communicate). It's not an ideal design (we always prefer the CPU to be busy, especially on an 8-bit machine), but paradoxically, it's sometimes the most efficient solution.
In this case, we use Z80 assembly instructions that do not modify registers (or as little as possible) so that we don't need to re-establish a context after waiting.
Here's a list of instructions for waiting a certain number of cycles in the smallest possible size:
| Inst. | T-S | Bytes | Flag modification |
|---|---|---|---|
| NOP | 5 | 1 | None |
| CP (HL) | 8 | 1 | C, S, and Z flags modified by definition. P/V detects overflow. |
| NOP NOP |
10 | 2 | None |
| SCF RET NC |
11 | 2 | Carry flag set, H and N cleared, rest are preserved. |
| JR $+2 | 13 | 2 | None |
| BIT 0,(HL) | 14 | 2 | Opposite of the bit #0 is written into the Z flag. C is preserved, N is reset, H is set, and S and P/V are undefined. |
| NOP NOP NOP |
15 | 3 | None |
| CP (HL) CP (HL) |
16 | 2 | C, S, and Z flags modified by definition. P/V detects overflow. |
| SCF RET NC RET NC |
17 | 3 | Carry flag set, H and N cleared, rest are preserved. |
| NOP JR $+2 |
18 | 3 | None |
| NOP BIT 0,(HL) |
19 | 3 | Opposite of the bit #0 is written into the Z flag. C is preserved, N is reset, H is set, and S and P/V are undefined. |
| NOP NOP NOP NOP |
20 | 4 | None |
| CP (IY+0) | 21 | 3 | C, S, and Z flags modified by definition. P/V detects overflow. |
| CP (HL) BIT 0,(HL) |
22 | 3 | C, S, and Z flags modified by definition. P/V detects overflow. Opposite of the bit #0 is written into the Z flag. C is preserved, N is reset, H is set, and S and P/V are undefined. |
| PUSH AF POP AF |
23 | 2 | None |
| CP (HL) CP (HL) CP (HL) |
24 | 3 | C, S, and Z flags modified by definition. P/V detects overflow. |
| INC (HL) DEC (HL) |
24 | 2 | Preserves C flag, N flag is reset, P/V detects overflow and rest are modified by definition. C flag preserved, P/V detects overflow and rest modified by definition. ⚠️ Not interrupt safe |
| NOP NOP NOP NOP NOP |
25 | 5 | None |
| JR $+2 JR $+2 |
26 | 4 | None |
| NOP CP (HL) BIT 0,(HL) |
27 | 4 | C, S, and Z flags modified by definition. P/V detects overflow. Opposite of the bit #0 is written into the Z flag. C is preserved, N is reset, H is set, and S and P/V are undefined. |
| NOP PUSH AF POP AF |
28 | 3 | None |
| CP (IY+0) CP (HL) |
29 | 4 | C, S, and Z flags modified by definition. P/V detects overflow. |
| NOP INC (HL) DEC (HL) |
29 | 3 | Preserves C flag, N flag is reset, P/V detects overflow and rest are modified by definition. C flag preserved, P/V detects overflow and rest modified by definition. ⚠️ Not interrupt safe |
| BIT 0,(HL) CP (HL) CP (HL) |
30 | 4 | Opposite of the bit #0 is written into the Z flag. C is preserved, N is reset, H is set, and S and P/V are undefined. C, S, and Z flags modified by definition. P/V detects overflow. |